Semiconductor devices and methods of forming the same
US11367662B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2020 |
| Grant date | Jun 21, 2022 |
| Priority date | — |
| Expiry date | Jul 24, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0177
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
The disclosed technology generally relates to semiconductor devices and methods of forming the same. In one aspect, a method of forming a semiconductor device having a first field-effect transistor (FET) device and a second FET device comprises forming the first and second FET devices from a first stack and a second stack comprising a channel material arranged on a sacrificial material. The method can include forming first spacers at sidewalls of the first and second stacks, and forming a second spacer between the first spacers. After recessing of the sacrificial material and removal of the first spacers, gate structures may be formed, wrapping around the at least partly released channel portions. The gate structure of the first transistor device can be separated from the gate structure of the second transistor device by the second spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.