Lars-Ake Ragnarsson
20Patents
7h-index
46Co-inventors
69Inventor score
Filing activity: Jan 8, 2001 → May 9, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7579285B2 | Atomic layer deposition method for depositing a layer | Electricity | 447 | Active |
| US9287273B2 | Method for manufacturing a semiconductor device comprising transistors each having a different effective work function | Electricity | 400 | Active |
| US6852575B2 | Method of forming lattice-matched structure on silicon and structure formed thereby | Electricity | 35 | Expired |
| US6831339B2 | Aluminum nitride and aluminum oxide/aluminum nitride heterostructure gate dielectric stack based field effect transistors and method for forming same | Electricity | 13 | Expired |
| US7432550B2 | Semiconductor structure including mixed rare earth oxide formed on silicon | Electricity | 9 | Expired |
| US7923743B2 | Semiconductor structure including mixed rare earth oxide formed on silicon | Electricity | 7 | Active |
| US6891231B2 | Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier | Electricity | 7 | Expired |
| US10607896B2 | Method of forming gate of semiconductor device and semiconductor device having same | Electricity | 4 | Active |
| US7648864B2 | Semiconductor structure including mixed rare earth oxide formed on silicon | Electricity | 3 | Active |
| US7169674B2 | Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier | Electricity | 3 | Expired |
| US9245759B2 | Method for manufacturing a dual work function semiconductor device | Electricity | 3 | Active |
| US9892923B2 | Method for tuning the effective work function of a metal | Electricity | 1 | Active |
| US11367662B2 | Semiconductor devices and methods of forming the same | Electricity | 1 | Active |
| US10424517B2 | Method for manufacturing a dual work function semiconductor device and the semiconductor device made thereof | Electricity | 1 | Active |
| US8211812B2 | Method for fabricating a high-K dielectric layer | Electricity | 0 | Active |
| US7812413B2 | MOSFET devices and methods for making them | Electricity | 0 | Active |
| US7488640B2 | Aluminum nitride and aluminum oxide/aluminum nitride heterostructure gate dielectric stack based field effect transistors and method for forming same | Electricity | 0 | Expired |
| US11837652B2 | Semiconductor processing system with in-situ electrical bias and methods thereof | Electricity | 0 | Active |
| US11335792B2 | Semiconductor processing system with in-situ electrical bias and methods thereof | Electricity | 0 | Active |
| US11894240B2 | Semiconductor processing systems with in-situ electrical bias | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.