Patent · US Active

Layout for measuring overlapping state

US11367718B1 · kind B1 · utility

0Cited by

1References

14Claims

0Family size

Assignee

UNITED MICROELECTRONICS CORP. · TW

Inventors

Chi-Hung Chan · Kowloon, CN
Chun-Chiao Tseng · Taichung, TW
Hung-Ming Su · Taichung, TW

Key dates

Filing date	Dec 16, 2020
Grant date	Jun 21, 2022
Priority date	—
Expiry date	Dec 16, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH10B12/488
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A layout for measuring an overlapping state includes a layout region, a first dummy active area region, and dummy component regions. The first dummy active area region is located in the layout region. The dummy component regions are stacked in the layout region. At the moment when one of the dummy component regions is formed on the first dummy active area region, the one of the dummy component regions and the first dummy active area region have a first overlapping region, and the first overlapping region does not include other dummy component regions among the dummy component regions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.