Management of multiple memory in-field self-repair options
US11373726B2 · kind B2 · utility
1Cited by
2References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2019 |
| Grant date | Jun 28, 2022 |
| Priority date | — |
| Expiry date | Aug 13, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a processor and a memory set coupled to the processor. The system also includes a repair circuit coupled to the memory set. The repair circuit includes a first repair circuit and a second repair circuit. The repair circuit also includes a test controller configured to select between the first repair circuit and the second repair circuit to perform an in-field self-repair of the memory set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.