Method of manufacturing dynamic random access memory
US11374011B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 2021 |
| Grant date | Jun 28, 2022 |
| Priority date | — |
| Expiry date | May 11, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/488
Abstract
A method for manufacturing a DRAM includes: forming a hard mask layer on a substrate with an opening therein; forming a dielectric layer on a sidewall of the opening; forming a first barrier layer and a first conductor layer in the opening; performing a first dry etching and a first wet etching processes to respectively partially remove the first barrier layer and the first conductor layer, to expose the dielectric layer on upper sidewall; forming a second barrier layer in the opening; forming a mask layer in the opening to cover the second barrier layer; removing a part of the second barrier layer and the mask layer to expose the dielectric layer on the upper sidewall of the opening; and forming a second conductor layer in the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.