Interleaved video coding pipeline
US11375225B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2018 |
| Grant date | Jun 28, 2022 |
| Priority date | — |
| Expiry date | Apr 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/61
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a memory and a hardware pipeline. The memory may be configured to store video data. The video data includes a plurality of sections of one or more pictures that may be processed independently. The hardware pipeline comprises a plurality of pipeline stages implementing a video coding process comprising a number of steps. Each of the plurality of pipeline stages performs an associated task of a different step of the video coding process in a substantially similar time on a different one of the plurality of sections as each of the plurality of sections pass through each of the pipeline stages. At least one of the plurality of pipeline stages communicates predictor information that is based on actual neighbor data to an earlier stage of the hardware pipeline.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.