Patent · US Active

Refresh logic circuit layout having aggressor detector circuit sampling circuit and row hammer refresh control circuit

US11380382B2 · kind B2 · utility

16Cited by

144References

20Claims

0Family size

Assignee

Micron Technology, Inc. · US

Inventors

Yu Zhang · Farmington Hills, US
Liang Li · Beijing, CN
Jun Wu · Shanghai, CN

Key dates

Filing date	Aug 19, 2020
Grant date	Jul 5, 2022
Priority date	—
Expiry date	Aug 19, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/4087
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments of the disclosure are drawn to apparatuses, systems, and methods for providing refresh logic, such as row hammer refresh circuitry, in a location on a memory die apart from a bank logic region of the memory die. In some examples, at least some of the components of the row hammer refresh circuitry may be shared between banks of the memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.