Method for detecting an attempt to breach the integrity of a semiconductor substrate of an integrated circuit from its back face, and corresponding integrated circuit
US11387194B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | May 12, 2020 |
| Grant date | Jul 12, 2022 |
| Priority date | — |
| Expiry date | Jul 31, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/034
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor substrate has a front face and a back face. A first contact and a second contact, spaced apart from each other, are located on the front face. An electrically conductive wafer is located on the back face. A detection circuit is configured to detect a thinning of the substrate from the back face. The detection circuit including a measurement circuit that takes a measurement of a resistive value of the substrate between said at least one first contact, said at least one second contact and said electrically conductive wafer. Thinning is detected in response to the measured resistive value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.