Patent · US Active

Fan-out type semiconductor package and method of manufacturing the same

US11387225B2 · kind B2 · utility

0Cited by
4References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 10, 2020
Grant dateJul 12, 2022
Priority date
Expiry dateAug 10, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/18161
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A fan-out type semiconductor package may include a frame, an upper chip stack, a first redistribution pattern, a lower chip stack, a second redistribution pattern and a redistribution post. The frame may have a cavity. The upper chip stack may be arranged in the cavity. The first redistribution pattern may be arranged under the frame. The first redistribution pattern may be electrically connected with the upper chip stack. The lower chip stack may be arranged under the first redistribution pattern. The second redistribution pattern may be arranged under the lower chip stack. The second redistribution pattern may be electrically connected with the lower chip stack. The redistribution post may be electrically connected between the first redistribution pattern and the second redistribution pattern. Thus, the fan-out type semiconductor package may have an improved heat dissipation characteristic with a thin thickness.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.