Patent · US Active

Serializing and deserializing stage testing

US11392452B2 · kind B2 · utility

1Cited by
9References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 14, 2019
Grant dateJul 19, 2022
Priority date
Expiry dateJun 14, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/09
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A first serializing stage is provided with a stream of data words composed of sub-words that each have values that associate each of the sub-words with the same error detection code value. For example, the values selected for each sub-word may each be associated with even parity. One or more serializing stages time-multiplex the sub-words into a stream of sub-word sized data. At the serializing stage that receives sub-word sized data stream, the data is checked to determine whether any of the sub-words is no longer associated with the error detection code value. Serializing/deserializing stages are selectively controlled to replace one or more data bits from a word being serialized/deserialized with an error detecting code value (e.g., parity). A subsequent serializing/deserializing stage is enabled to use the inserted error detecting code values and the data in the received words to determine whether an error has occurred.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.