Systems and methods for an intelligent mapping of neural network weights and input data to an array of processing cores of an integrated circuit
US11392667B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2021 |
| Grant date | Jul 19, 2022 |
| Priority date | — |
| Expiry date | Dec 20, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/045
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods of configuring an array of processors of an integrated circuit includes identifying a fast Fourier transform (FFT) matrix multiply of input data, wherein the FFT matrix multiply of the input data includes a bit-reversed input array, configuring the array of processing cores based on the bit-reversed input array, wherein the configuring the array of processing cores includes storing the input bits of the bit-reversed input array within memory circuits of distinct processing cores of an array of processing cores of the integrated circuit based on an input bit mapping that identifies a pre-determined storage location within the array of processing cores of each input bit of the bit-reversed input array, and performing matrix multiply computations between weight stages of the FFT matrix multiply and the input bits of the bit-reversed input array stored within the memory circuits of the distinct processing cores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.