Partially resident bounding volume hierarchy
US11393156B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2020 |
| Grant date | Jul 19, 2022 |
| Priority date | — |
| Expiry date | Jun 29, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T17/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for performing ray tracing for a ray are provided. The techniques include, based on first traversal of a bounding volume hierarchy, identifying a first memory page that is classified as resident, obtaining a first portion of the bounding volume hierarchy associated with the first memory page, traversing the first portion of the bounding volume hierarchy according to a ray intersection test, based on second traversal of the bounding volume hierarchy, identifying a second memory page that is classified as valid and non-resident, and in response to the second memory page being classified as valid and non-resident, determining that a miss occurs for each node of the bounding volume hierarchy within the second memory page.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.