Patent · US Active

Semiconductor structure and fabrication method thereof

US11393685B2 · kind B2 · utility

0Cited by
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18Claims
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Key dates

Filing dateSep 23, 2020
Grant dateJul 19, 2022
Priority date
Expiry dateSep 23, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/31144
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present disclosure provides a method for forming a semiconductor structure. The method includes providing a to-be-etched layer; forming a plurality of initial sidewall spacers on the to-be-etched layer; and performing at least one modification treatment process on the plurality of initial sidewall spacers to form a plurality of sidewall spacers. Each of the at least one modification treatment process includes modifying the plurality of initial sidewall spacers to form a transition layer on the top and sidewall surfaces of each initial sidewall spacer of the plurality of initial sidewall spacers, and then removing the transition layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.