Semiconductor structure and method for forming the same
US11393718B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2020 |
| Grant date | Jul 19, 2022 |
| Priority date | — |
| Expiry date | Sep 3, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor structure includes forming a first cap layer over a metal layer. The method also includes patterning the metal layer and the first cap layer to form openings exposing the gate structure, and forming a first dielectric layer in the openings, and patterning the first cap layer to form a via cap plug over the metal layer. The method also includes forming a second dielectric layer over the via cap plug and the metal layer, and forming a trench in the second dielectric material to expose the via cap plug. The method also includes removing the via cap plug to enlarge the trench and filling the trench with a conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.