Inventor

Chieh-Han Wu

15Patents

3h-index

20Co-inventors

56Inventor score

Filing activity: Dec 19, 2013 → Apr 17, 2023

Most-cited inventions

Patent	Title	Area	Cited by	Status
US9576814B2	Method of spacer patterning to form a target integrated circuit pattern	Electricity	2,776	Active
US9184054B1	Method for integrated circuit patterning	Electricity	751	Active
US9136106B2	Method for integrated circuit patterning	Electricity	11	Active
US9418886B1	Method of forming conductive features	Electricity	3	Active
US11251118B2	Self-aligned via structures with barrier layers	Electricity	2	Active
US11631639B2	Method of fabricating self-aligned via structures	Electricity	1	Active
US12165920B2	Semiconductor structure and method for forming the same	Electricity	0	Active
US9418862B2	Method for integrated circuit patterning	Electricity	0	Active
US9640397B2	Method of fabricating a semiconductor integrated circuit using a directed self-assembly block copolymer	Electricity	0	Active
US9653349B2	Semiconductor integrated circuit with nano gap	Electricity	0	Active
US12046551B2	Interconnect structure having a barrier layer along the sidewall of self-aligned via structures	Electricity	0	Active
US10049919B2	Semiconductor device including a target integrated circuit pattern	Electricity	0	Active
US11676862B2	Semiconductor device structure and methods of forming the same	Electricity	0	Active
US11830910B2	Semiconductor structure having air gaps and method for manufacturing the same	Electricity	0	Active
US11393718B2	Semiconductor structure and method for forming the same	Electricity	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.