Semiconductor device and method for fabricating the semiconductor device
US11393839B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 2020 |
| Grant date | Jul 19, 2022 |
| Priority date | — |
| Expiry date | Oct 9, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/35
Abstract
Disclosed is a semiconductor device with improved electrical characteristics and a method for fabricating the same, and the method may include forming an alternating stack in which dielectric layers and sacrificial layers are alternately stacked on a substrate, forming a first through portion in the alternating stack, etching first portions of the sacrificial layers through the first through portion, to form lateral recesses between the dielectric layers, forming charge trapping layers isolated in the lateral recesses, forming a second through portion by etching the alternating stack in which second portions of the sacrificial layers remain, removing the second portions of the sacrificial layers through the second through portion, to form gate recesses that expose non-flat surfaces of the charge trapping layers, flattening the non-flat surfaces of the charge trapping layers, and forming a gate electrode that fills the gate recesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.