Patent · US Active

Approaches for embedding spin hall MTJ devices into a logic processor and the resulting structures

US11393873B2 · kind B2 · utility

1Cited by
4References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 7, 2016
Grant dateJul 19, 2022
Priority date
Expiry dateMar 20, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10N52/80
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Approaches for embedding spin hall MTJ devices into a logic processor, and the resulting structures, are described. In an example, a logic processor includes a logic region including fin-FET transistors disposed in a dielectric layer disposed above a substrate. The logic processor also includes a memory array including a plurality of two-transistor one magnetic tunnel junction (MTJ) spin hall electrode (2T1MTJ SHE) bit cells. The transistors of the 2T1MTJ SHE bit cells are fin-FET transistors disposed in the dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.