Forced current access with voltage clamping in cross-point array
US11398262B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 2021 |
| Grant date | Jul 26, 2022 |
| Priority date | — |
| Expiry date | Apr 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/84
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technology for limiting a voltage difference between two selected conductive lines in a cross-point array when using a forced current approach is disclosed. In one aspect, the selected word line voltage is clamped to a voltage limit while driving an access current through a region of the selected word line and through a region of the selected bit line. The access current flows through the memory cell to allow a sufficient voltage to successfully read or write the memory cell, while not placing undue stress on the memory cell. In some aspects, the maximum voltage that is permitted on the selected word line depends on the location of the selected memory cell in the cross-point memory array. This allows memory cells for which there is a larger IR drop to receive an adequate voltage, while not over-stressing memory cells for which there is a smaller IR drop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.