Semiconductor module arrangement with fast switching, reduced losses, and low voltage overshoot and method for operating the same
US11398768B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 17, 2020 |
| Grant date | Jul 26, 2022 |
| Priority date | — |
| Expiry date | Nov 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48225
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor module arrangement includes an input stage including a first output terminal and a second output terminal, wherein a first inductive element is coupled to the first output terminal; an output stage including at least one first controllable semiconductor element, a third input terminal coupled to the first inductive element such that the first inductive element is coupled between the first output terminal and the third input terminal, a fourth input terminal coupled to the second output terminal, a third output terminal, and a fourth output terminal; a second controllable semiconductor element and a first capacitive element coupled in series and between a first common node coupled between the first inductive element and the third input terminal, and a second common node coupled between the second output terminal and the fourth input terminal; and a first diode element coupled in parallel to the second controllable semiconductor element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.