Semiconductor lithography system and/or method
US11402761B2 · kind B2 · utility
2Cited by
2References
20Claims
0Family size
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Key dates
| Filing date | Mar 2, 2021 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | Mar 2, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70383
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A lithography method to pattern a first semiconductor wafer is disclosed. An optical mask is positioned over the first semiconductor wafer. A first region of the first semiconductor wafer is patterned by directing light from a light source through transparent regions of the optical mask. A second region of the first semiconductor wafer is patterned by directing energy from an energy source to the second region, wherein the patterning of the second region comprises direct-beam writing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.