Systems and methods for in-field core failover
US11403194B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2020 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | Jan 31, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2043
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multicore processor may include multiple processing cores that were previously designated as active cores and at least one processing core that was previously designated as a functional spare. The processor may include an interface to receive, during operation of the processor in an end-user environment, a request to change the designation of at least one of the processing cores. The processor may be to store, into a desired cores configuration data structure in response to the request, data representing a bitmask that reflects the requested change, and to execute a reset sequence. During the reset sequence, the processor may activate, dependent on the bitmask, a processing core previously designated as a functional spare, or may deactivate, dependent on the bitmask, a processing core previously designated as an active core. The processor may include a predetermined maximum number of active cores and a predetermined minimum number of functional spares.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.