Inventor · Hillsboro, OR, US

Ian M. Steiner

34Patents
4h-index
100Co-inventors
62Inventor score

Filing activity: Dec 28, 2007 → Jul 5, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US11922220B2 Function as a service (FaaS) system enhancements Physics 29 Active
US9495001B2 Forcing core low power states in a processor Emerging Cross-Sectional Technologies 4 Active
US11169560B2 Configuration of base clock frequency of processor based on usage parameters Emerging Cross-Sectional Technologies 4 Active
US9141426B2 Processor having per core and package level P0 determination functionality Emerging Cross-Sectional Technologies 4 Active
US9098261B2 User level control of power management policies Physics 3 Active
US9880601B2 Method and apparatus to control a link power state Emerging Cross-Sectional Technologies 3 Active
US11703906B2 Configuration of base clock frequency of processor based on usage parameters Emerging Cross-Sectional Technologies 2 Active
US9170624B2 User level control of power management policies Physics 2 Active
US9372524B2 Dynamically modifying a power/performance tradeoff based on processor utilization Emerging Cross-Sectional Technologies 2 Active
US7991963B2 In-memory, in-page directory cache coherency scheme Physics 2 Active
US10372197B2 User level control of power management policies Physics 2 Active
US7885914B2 Systems, methods and apparatuses for rank coordination Physics 2 Active
US12066853B2 Configuration of base clock frequency of processor based on usage parameters Emerging Cross-Sectional Technologies 1 Active
US11409560B2 System, apparatus and method for power license control of a processor Emerging Cross-Sectional Technologies 1 Active
US9377841B2 Adaptively limiting a maximum operating frequency in a multicore processor Emerging Cross-Sectional Technologies 1 Active
US10627885B2 Hybrid prioritized resource allocation in thermally- or power-constrained computing devices Emerging Cross-Sectional Technologies 1 Active
US11403194B2 Systems and methods for in-field core failover Physics 1 Active
US10866834B2 Apparatus, method, and system for ensuring quality of service for multi-threading processor cores Electricity 1 Active
US8429367B2 Systems, methods and apparatuses for clock enable (CKE) coordination Physics 1 Active
US10552270B2 Systems and methods for in-field core failover Physics 1 Active
US10146287B2 Processor power monitoring and control with dynamic load balancing Emerging Cross-Sectional Technologies 0 Active
US12416940B2 Configuration of base clock frequency of processor based on usage parameters Emerging Cross-Sectional Technologies 0 Active
US9405351B2 Performing frequency coordination in a multiprocessor system Emerging Cross-Sectional Technologies 0 Active
US10310588B2 Forcing core low power states in a processor Emerging Cross-Sectional Technologies 0 Active
US11079819B2 Controlling average power limits of a processor Emerging Cross-Sectional Technologies 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.