Memory device protection using interleaved multibit symbols
US11404136B2 · kind B2 · utility
2Cited by
6References
22Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 16, 2020 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | Dec 16, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Symbols interleaved among a set of codewords can provide an error correction/detection capability to a dual in-line memory module (DIMM) with memory chips having a comparatively larger bus width. Data corresponding to a set of multibit symbols and received from one or more memory devices can be interleaved/distributed with other bits of at least one codeword.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.