Backside capacitor techniques
US11404534B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2020 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | Jul 18, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments relate to a semiconductor structure including a semiconductor substrate having a frontside surface and a backside surface. An interconnect structure is disposed over the frontside surface. The interconnect structure includes a plurality of metal lines and vias that operably couple semiconductor transistor devices disposed in or on the frontside surface of the semiconductor substrate to one another. A trench is disposed in the backside surface of the semiconductor substrate. The trench is filled with an inner capacitor electrode, a capacitor dielectric layer overlying the inner capacitor electrode, and an outer capacitor electrode overlying the capacitor dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.