Inventor · Tainan, TW

Hsing-Chih Lin

65Patents
4h-index
38Co-inventors
62Inventor score

Filing activity: Dec 13, 2013 → Jul 27, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US10157946B2 Method for forming CMOS image sensor structure Electricity 6 Active
US10629592B2 Through silicon via design for stacking integrated circuits Electricity 6 Active
US9263437B2 Mechanisms for forming metal-insulator-metal (MIM) capacitor structure Electricity 5 Active
US10510592B2 Integrated circuit (IC) structure for high performance and functional density Electricity 4 Active
US9818779B2 CMOS image sensor structure Electricity 4 Active
US10964692B2 Through silicon via design for stacking integrated circuits Electricity 3 Active
US11063038B2 Through silicon via design for stacking integrated circuits Electricity 3 Active
US9246084B2 RRAM cell including V-shaped structure Electricity 2 Active
US10916502B2 Semiconductor device and manufacturing method thereof Electricity 2 Active
US9257486B2 RRAM array having lateral RRAM cells and vertical conducting structures Electricity 2 Active
US10504784B2 Inductor structure for integrated circuit Electricity 2 Active
US11282769B2 Oversized via as through-substrate-via (TSV) stop layer Electricity 2 Active
US11195818B2 Backside contact for thermal displacement in a multi-wafer stacked integrated circuit Electricity 2 Active
US10163878B2 Semiconductor structure and method for manufacturing the same Electricity 2 Active
US11791332B2 Stacked semiconductor device and method Electricity 1 Active
US10049981B2 Through via structure, semiconductor device and manufacturing method thereof Electricity 1 Active
US10727205B2 Hybrid bonding technology for stacking integrated circuits Electricity 1 Active
US11942368B2 Through silicon vias and methods of fabricating thereof Electricity 1 Active
US9620553B2 CMOS image sensor structure with crosstalk improvement Electricity 1 Active
US10811398B2 Semiconductor structure and method for manufacturing the same Electricity 1 Active
US11410972B2 Hybrid bonding technology for stacking integrated circuits Electricity 1 Active
US11177302B2 CMOS image sensor structure with microstructures formed on semiconductor layer Electricity 1 Active
US11322481B2 Hybrid bonding technology for stacking integrated circuits Electricity 1 Active
US11404534B2 Backside capacitor techniques Electricity 1 Active
US11756862B2 Oversized via as through-substrate-via (TSV) stop layer Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.