Method of forming a p-type layer for a light emitting device
US11404599B2 · kind B2 · utility
0Cited by
5References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2020 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | Jul 2, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H29/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method according to embodiments of the invention, a semiconductor structure including a III-nitride light emitting layer disposed between a p-type region and an n-type region is grown. The p-type region is buried within the semiconductor structure. A trench is formed in the semiconductor structure. The trench exposes the p-type region. After forming the trench, the semiconductor structure is annealed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.