Semiconductor structure having a dielectric layer edge covering circuit carrier
US11410897B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2019 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Sep 25, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a circuit carrier, a dielectric layer, a conductive terminal, a semiconductor die, and an insulating encapsulation. The circuit carrier includes a first surface and a second surface opposite to each other, a sidewall connected to the first and second surfaces, and an edge between the second surface and the sidewall. The dielectric layer is disposed on the second surface of the circuit carrier and extends to at least cover the edge of the circuit carrier. The conductive terminal is disposed on and partially embedded in the dielectric layer to be connected to the circuit carrier. The semiconductor die encapsulated by the insulating encapsulation is disposed on the first surface of the circuit carrier and electrically coupled to the conductive terminal through the circuit carrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.