Semiconductor memory device and method of manufacturing the same
US11411007B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2020 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Feb 5, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a memory cell array of a three-dimensional structure including a plurality of memory cells repeatedly arranged in a first horizontal direction and a second horizontal direction that are parallel with a main surface of a substrate and cross each other on the substrate and in a vertical direction perpendicular to the main surface, wherein each of the plurality of memory cells includes three transistors. A method of manufacturing a semiconductor memory device includes forming simultaneously a plurality of memory cells arranged in a row in a vertical direction on a substrate, wherein each of the plurality of memory cells includes three transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.