Structure of stacked gate-all-around nano-sheet CMOS device and method for manufacturing the same

US11411091B2 · kind B2 · utility

Assignee

• INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES · CN

Inventors

• Huaxiang Yin · Beijing, CN
• Tianchun Ye · Beijing, CN
• Qingzhu ZHANG · Beijing, CN
• Jiaxin YAO · Beijing, CN

Key dates

• Filing date: Oct 30, 2019
• Grant date: Aug 9, 2022
• Expiry date: Apr 25, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0172

Abstract

A method for manufacturing a stacked gate-all-around nano-sheet CMOS device, including: providing a substrate with a fin structure, where a channel layer for an NMOS is a sacrificial layer for a PMOS, a channel layer for the PMOS is a sacrificial layer for the NMOS; and mobility of holes in the second material is greater than mobility of holes in the first material; forming a dummy gate stack extending across the fin structure; forming source-or-drain regions in the fin structure at two sides of the dummy gate stack; removing the dummy gate stack and the sacrificial layers covered by the dummy gate stack, to expose a surface of a part of the channel layer that is located between the source-or-drain regions, where a nano-sheet array is formed by the channel layer with the exposed surface; and forming a gate stack structure surrounding each nano sheet in the nano-sheet array.