Epitaxial source or drain structures for advanced integrated circuit structure fabrication
US11411095B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2017 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Sep 27, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0149
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a fin comprising silicon, the fin having a lower fin portion and an upper fin portion. A gate electrode is over the upper fin portion of the fin, the gate electrode having a first side opposite a second side. A first epitaxial source or drain structure is embedded in the fin at the first side of the gate electrode. A second epitaxial source or drain structure is embedded in the fin at the second side of the gate electrode, the first and second epitaxial source or drain structures comprising silicon and germanium and having a match-stick profile.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.