Robust current sensing during inverse current load conditions
US11411562B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2019 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Oct 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/141
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A current sensing circuit includes load transistors having a current path coupled between a power terminal and corresponding load terminals, sense transistors having a current path coupled between the power terminal and corresponding sense terminals, each sense transistor being coupled to a respective load transistor, N-channel transistors having a current path coupled between a respective sense transistor and a respective sense terminal, an amplifier for selectively equalizing the voltages across one of the load transistors and one of the sense transistors, and bypass circuits coupled to a bulk terminal of the N-channel transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.