Patent · US Active

Method for manufacturing semiconductor device

US11429019B2 · kind B2 · utility

1Cited by
1References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 8, 2020
Grant dateAug 30, 2022
Priority date
Expiry dateDec 8, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/18
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for manufacturing a semiconductor device is provided. The method includes providing a first layout including a plurality of first features and a second layout including a plurality of second features; shifting the second layout to generate a plurality of virtual layouts; comparing a score of each of the plurality of virtual layouts and determining a modified second layout having a target score out of the plurality of virtual layouts; and outputting the modified second layout to a photomask.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.