Computation-in-memory in three-dimensional memory device
US11430785B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2020 |
| Grant date | Aug 30, 2022 |
| Priority date | — |
| Expiry date | Nov 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Three-dimensional (3D) memory devices and methods for forming the same are provided. In an example, a method for forming a 3D memory device includes forming a first semiconductor structure including a peripheral circuit, a data processing circuit, and a first bonding layer including a plurality of first bonding contacts. The method also includes forming a second semiconductor structure including an array of 3D NAND memory strings and a second bonding layer including a plurality of second bonding contacts. The method further includes bonding the first semiconductor structure and the second semiconductor structure in a face-to-face manner, such that the first bonding contacts are in contact with the second bonding contacts at a bonding interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.