Patent · US Active

Integrated assemblies having transistors configured for high-voltage applications

US11430888B2 · kind B2 · utility

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1References
34Claims
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Assignee

Inventors

Key dates

Filing dateJul 2, 2020
Grant dateAug 30, 2022
Priority date
Expiry dateAug 4, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/856

Abstract

Some embodiments include an integrated assembly having a first gate operatively adjacent a channel region, a first source/drain region on a first side of the channel region, and a second source/drain region on an opposing second side of the channel region. The first source/drain region is spaced from the channel region by an intervening region. The first and second source/drain regions are gatedly coupled to one another through the channel region. A second gate is adjacent a segment of the intervening region and is spaced from the first gate by an insulative region. A lightly-doped region extends across the intervening region and is under at least a portion of the first source/drain region. Some embodiments include methods of forming integrated assemblies.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.