Resistive random access memory device with switching multi-layer stack and methods of fabrication

US11430948B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Timothy E. Glassman · Portland, US
• Dragos Seghete · Portland, US
• Nathan Strutt · Beaverton, US
• Namrata S. Asuri · Portland, US
• Oleg Golonzka · Beaverton, US
• Hiten Kothari · Beaverton, US
• Matthew John Andrus · Hillsboro, US

Key dates

• Filing date: Sep 28, 2017
• Grant date: Aug 30, 2022
• Expiry date: Oct 7, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8833

Abstract

A memory device includes a bottom electrode above a substrate, a first switching layer on the bottom electrode, a second switching layer including aluminum on the first switching layer, an oxygen exchange layer on the second switching layer and a top electrode on the oxygen exchange layer. The presence of the second switching layer including aluminum on the first switching layer enables a reduction in electro-forming voltage of the memory device.