Patent · US Active

Forming a cavity with a wet etch for backside contact formation

US11437480B2 · kind B2 · utility

2Cited by

0References

20Claims

0Family size

Assignee

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

Yi-Hsiu Chen · Hsinchu, TW
Andrew Joseph Kelly · Hengshan, TW

Key dates

Filing date	Nov 13, 2020
Grant date	Sep 6, 2022
Priority date	—
Expiry date	Nov 21, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH10D62/822
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

In some embodiments, the present disclosure relates to an integrated chip that includes a channel structure extending between a first source/drain region and a second source/drain region. Further, a gate electrode is arranged directly over the channel structures, and an upper interconnect contact is arranged over and coupled to the gate electrode. A backside contact is arranged below and coupled to the first source/drain region. The backside contact has a width that decreases from a bottommost surface of the backside contact to a topmost surface of the backside contact.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.