Yi-Hsiu Chen
45Patents
4h-index
45Co-inventors
59Inventor score
Filing activity: Oct 20, 2008 → Feb 22, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9425126B2 | Dummy structure for chip-on-wafer-on-substrate | Electricity | 819 | Active |
| US9893028B2 | Bond structures and the methods of forming the same | Electricity | 8 | Active |
| US10636842B1 | Resistive random access memory and method for forming the same | Electricity | 7 | Active |
| US8803322B2 | Through substrate via structures and methods of forming the same | Electricity | 5 | Active |
| US9583465B1 | Three dimensional integrated circuit structure and manufacturing method of the same | Electricity | 4 | Active |
| US9842823B2 | Chip-stacking apparatus having a transport device configured to transport a chip onto a substrate | Electricity | 3 | Active |
| US9263382B2 | Through substrate via structures and methods of forming the same | Electricity | 3 | Active |
| US10163623B1 | Etch method with surface modification treatment for forming semiconductor structure | Electricity | 3 | Active |
| US10163709B2 | Semiconductor device and method | Electricity | 3 | Active |
| US10879214B2 | Die stack structure and method of fabricating the same | Electricity | 3 | Active |
| US10665582B2 | Method of manufacturing semiconductor package structure | Electricity | 2 | Active |
| US10269741B2 | Bond structures and the methods of forming the same | Electricity | 2 | Active |
| US10593877B2 | Resistive random access memory | Electricity | 2 | Active |
| US11437480B2 | Forming a cavity with a wet etch for backside contact formation | Electricity | 2 | Active |
| US9754831B2 | Dummy structure for chip-on-wafer-on-substrate | Electricity | 2 | Active |
| US9418933B2 | Through-substrate via formation with improved topography control | Electricity | 2 | Active |
| US9601410B2 | Semiconductor device and method | Electricity | 2 | Active |
| US11817361B2 | Passivation structure with planar top surfaces | Electricity | 1 | Active |
| US11502131B2 | Resistive random access memory device and manufacturing method thereof | Physics | 1 | Active |
| US11942527B2 | Forming a cavity with a wet etch for backside contact formation | Electricity | 1 | Active |
| US10510604B2 | Semiconductor device and method | Electricity | 1 | Active |
| US9972779B2 | Resistive random access memory | Electricity | 1 | Active |
| US10269761B2 | Semiconductor device and method | Electricity | 1 | Active |
| US9960349B2 | Resistive random-access memory structure and method for fabricating the same | Electricity | 1 | Active |
| US10867943B2 | Die structure, die stack structure and method of fabricating the same | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.