Memory device for generating data strobe signal based on pulse amplitude modulation, memory controller, and memory system including the same
US11443785B2 · kind B2 · utility
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Key dates
| Filing date | Jun 10, 2021 |
| Grant date | Sep 13, 2022 |
| Priority date | — |
| Expiry date | Jun 10, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/101
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a memory cell array and a data input and output circuit configured to output a data signal (DQ signal) including data read from the memory cell array and a data strobe signal (DQS signal) including a toggle pattern associated with an operating condition of the memory device based on n-level pulse amplitude modulation (PAMn), wherein n is an integer greater than or equal to 4.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.