Patent · US Active

Memory cell, memory cell arrangement, and methods thereof

US11443792B1 · kind B1 · utility

9Cited by
6References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 12, 2021
Grant dateSep 13, 2022
Priority date
Expiry dateAug 12, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B51/30
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Various aspects relate to a memory cell including: a field-effect transistor memory structure, wherein a source/drain current through the field-effect transistor memory structure is a function of a gate voltage supplied to a gate of the field-effect transistor memory structure and a memory state in which the field-effect transistor memory structure is residing in; and an access device coupled to the gate of the field-effect transistor memory structure, wherein the access device is configured to control a voltage present at the gate of the field-effect transistor memory structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.