Semiconductor package
US11444060B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2020 |
| Grant date | Sep 13, 2022 |
| Priority date | — |
| Expiry date | May 26, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/1094
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package-on-package type package includes a lower semiconductor package and an upper semiconductor package. The lower semiconductor package includes a first semiconductor device including a through electrode, a second semiconductor device disposed on the first semiconductor device and including a second through electrode electrically connected to the first through electrode, a first molding member covering a sidewall of at least one of the first semiconductor device and the second semiconductor device, a second molding member covering a sidewall of the first molding member, and an upper redistribution layer disposed on the second semiconductor device and electrically connected to the second through electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.