Data storage device with syndrome weight minimization for data alignment
US11449236B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2020 |
| Grant date | Sep 20, 2022 |
| Priority date | — |
| Expiry date | Dec 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/458
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A memory controller that includes, in one implementation, a memory interface and a controller circuit. The memory interface is configured to interface with a non-volatile memory. The controller circuit is configured to receive a skewed codeword read from the non-volatile memory. The controller circuit is also configured to scan the skewed codeword by inserting or removing a quantity of bits at different locations in the skewed codeword and determining resulting syndrome weights of the skewed codeword. The controller circuit is further configured to determine an adjusted codeword by inserting or removing the quantity of bits at one of the different locations in the skewed codeword which results in a smallest syndrome weight. The controller circuit is also configured to decode the adjusted codeword.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.