Mark Shlick
29Patents
9h-index
40Co-inventors
71Inventor score
Filing activity: Apr 7, 2006 → Jul 28, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7502254B2 | Method for generating soft bits in flash memories | Physics | 55 | Active |
| US7613045B2 | Operation sequence and commands for measuring threshold voltage distribution in memory | Physics | 45 | Active |
| US7865658B2 | Method and system for balancing host write operations and cache flushing | Physics | 44 | Active |
| US7876621B2 | Adaptive dynamic reading of flash memories | Physics | 33 | Active |
| US8073648B2 | Measuring threshold voltage distribution in memory using an aggregate characteristic | Physics | 16 | Active |
| US8059456B2 | Programming a NAND flash memory with reduced program disturb | Physics | 12 | Active |
| US11373710B1 | Time division peak power management for non-volatile storage | Physics | 9 | Active |
| US8125833B2 | Adaptive dynamic reading of flash memories | Physics | 9 | Active |
| US9996281B2 | Temperature variation compensation | Physics | 9 | Active |
| US8891301B1 | Power drop protection for a data storage device | Physics | 8 | Active |
| US11385802B2 | Temperature variation compensation | Physics | 7 | Active |
| US9484114B1 | Decoding data using bit line defect information | Physics | 6 | Active |
| US9711227B1 | Non-volatile memory with in field failure prediction using leakage detection | Physics | 5 | Active |
| US9218851B2 | Power drop protection for a data storage device | Physics | 4 | Active |
| US10481816B2 | Dynamically assigning data latches | Physics | 3 | Active |
| US8112682B2 | Method and device for bad-block testing | Physics | 3 | Active |
| US10642510B2 | Temperature variation compensation | Physics | 3 | Active |
| US7952928B2 | Increasing read throughput in non-volatile memory | Physics | 3 | Active |
| US7657699B2 | Device and method for monitoring operation of a flash memory | Physics | 3 | Active |
| US8059463B2 | Method for generating soft bits in flash memories | Physics | 2 | Active |
| US8443260B2 | Error correction in copy back memory operations | Physics | 1 | Active |
| US11449236B2 | Data storage device with syndrome weight minimization for data alignment | Electricity | 1 | Active |
| US10162538B2 | Memory operation threshold adjustment based on bit line integrity data | Physics | 1 | Active |
| US9400747B2 | Batch command techniques for a data storage device | Physics | 1 | Active |
| US10360045B2 | Event-driven schemes for determining suspend/resume periods | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.