Hardware module for converting numbers
US11449309B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2019 |
| Grant date | Sep 20, 2022 |
| Priority date | — |
| Expiry date | Jun 21, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3832
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hardware module comprising circuitry configured to: store a sequence of n bits in a register of the hardware module; generate a signed integer comprising a magnitude component and a sign bit by: if the most significant bit of the sequence of n bits is equal to one: set each of the n−1 of the most significant bits of the magnitude component to be equal to the corresponding bit of the n−1 least significant bits of the sequence of n bits; and set the sign bit to be zero; if the most significant bit of the sequence of n bits is equal to zero: set each of the n−1 of the most significant bits of the magnitude component to be equal to the inverse of the corresponding bit of the n−1 least significant bits of the sequence of n bits; and set the sign bit to be one.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.