Trivalent lattice scheme to identify flag qubit outcomes
US11449783B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2019 |
| Grant date | Sep 20, 2022 |
| Priority date | — |
| Expiry date | Mar 8, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N10/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques regarding encoding a quantum circuit to a trivalent lattice scheme to identify flag qubit outcomes are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a graph component that can encode a quantum circuit to a trivalent lattice that maps an ancilla qubit to a plurality of data qubits via a plurality of flag qubits based on a connectivity scheme of the quantum circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.