Method for fabricating semiconductor device
US11450564B2 · kind B2 · utility
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5References
7Claims
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Key dates
| Filing date | Sep 12, 2019 |
| Grant date | Sep 20, 2022 |
| Priority date | — |
| Expiry date | Sep 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76855
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a source/drain region adjacent to two sides of the gate structure; forming an interlayer dielectric (ILD) layer on the gate structure; forming a contact hole in the ILD layer to expose the source/drain region; forming a barrier layer in the contact hole; performing an anneal process; and performing a plasma treatment process to inject nitrogen into the contact hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.