Semiconductor memory cell and the forming method thereof
US11450670B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2021 |
| Grant date | Sep 20, 2022 |
| Priority date | — |
| Expiry date | Apr 14, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B20/25
Abstract
The invention provides a semiconductor memory cell, the semiconductor memory cell includes a substrate having a first conductivity type, a doped region in the substrate, wherein the doped region has a second conductivity type, and the first conductivity type is complementary to the second conductivity type, a capacitor insulating layer and an upper electrode on the doped region, a transistor on the substrate, and a shallow trench isolation disposed between the transistor and the capacitor insulating layer, and the shallow trench isolation is disposed in the doped region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.