Semiconductor device including metal interconnections having sidewall spacers thereon, and method for fabricating the same
US11456207B2 · kind B2 · utility
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9Claims
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Key dates
| Filing date | Jul 22, 2019 |
| Grant date | Sep 27, 2022 |
| Priority date | — |
| Expiry date | Apr 6, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76885
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first metal interconnection in the first IMD layer; removing part of the first IMD layer; forming a spacer adjacent to the first metal interconnection; forming a second IMD layer on the spacer and the first metal interconnection; and forming a second metal interconnection in the second IMD layer and on the spacer and the first metal interconnection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.