Drain-extended transistor
US11456381B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2020 |
| Grant date | Sep 27, 2022 |
| Priority date | — |
| Expiry date | Dec 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
Described examples include an integrated circuit having a semiconductor substrate. The integrated circuit has a transistor that includes a buried layer having within the substrate, the buried layer defining a drift region between the buried layer and the top surface and a body region in the substrate extending from the buried layer to the surface of the substrate. The transistor also having a source formed in the body region, a drain extending from the buried layer to the surface of the substrate, a drift well extending from the buried layer toward the top surface and extending from the body region to the drain, a drift surface layer located between the drift well and the top, and a gate proximate to the surface of the substrate at the body region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.