Controller, operating method of the controller and memory system
US11461013B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2020 |
| Grant date | Oct 4, 2022 |
| Priority date | — |
| Expiry date | Sep 29, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7211
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes: a plurality of memory devices; a plurality of cores suitable for controlling the plurality of memory devices, respectively; and a controller including: a host interface layer for providing any one of the cores with a request of a host based on mapping between logical addresses and the cores, a remap manager for changing the mapping between the logical addresses and the cores in response to a trigger, a data swapper for swapping data between the plurality of memory devices based on the changed mapping, and a state manager for determining a state of the memory system depending on whether the data swapper is swapping the data or has completed swapping the data, and providing the remap manager with the trigger based on the state of the memory system and a difference in a degree of wear between the plurality of memory devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.