Memory system and operating method of memory system
US11461232B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 9, 2021 |
| Grant date | Oct 4, 2022 |
| Priority date | — |
| Expiry date | Jul 9, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure relate to a memory system and an operating method of the memory system. According to embodiments of the present disclosure, a memory system may set a plurality of physical function units and a read cache, may calculate, when a Read Look Ahead (RLA) execution condition is satisfied for a first physical function unit among the plurality of physical function units, a calibrated cache hit ratio for the first physical function unit based on one or more cache hit ratios for the first physical function unit calculated after a predetermined first reference time point, and may determine whether to execute an RLA operation for the first physical function unit based on the calibrated cache hit ratio for the first physical function unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.